In recent years, in inspection of semiconductor devices and masks, various metrology techniques using design data (layout patterns) created for semiconductor manufacturing have been proposed and have become to be used in measurements and so on of semiconductor devices relying on a scanning electron microscope (SEM).
In particular, patent literature 1 explains a technique for performing pattern matching between a line segment based on design data and a pattern image obtained by a scanning electron microscope and measuring a pattern identified by the pattern matching. More specifically, a reference image called a template is created on the basis of design data. The template and an electron microscope image are compared to thereby find the degree of match. A position at which there is a high degree of match is identified as a matching position.
Furthermore, a technique in which either a forecasted shape pattern of a transferred pattern obtained by simulating the exposure of the semiconductor process using design data or a pattern deformed by image processing is used for pattern recognition is proposed in patent literature 1.
Patent literature 2 explains a technique of previously obtaining an SEM image and turning the image into a template in order to create the template.